AArch64 MP+dmb.sy+addr-rfi-addr-[fr-rf]-addr "DMB.SYdWW Rfe DpAddrdW Rfi DpAddrdR FrLeave RfBack DpAddrdR Fre" Cycle=Rfi DpAddrdR FrLeave RfBack DpAddrdR Fre DMB.SYdWW Rfe DpAddrdW Relax= Safe=Rfi Rfe Fre DMB.SYdWW DpAddrdW DpAddrdR [FrLeave,RfBack] Prefetch=0:x=F,0:y=W,1:y=F,1:x=T Com=Rf Fr Rf Orig=DMB.SYdWW Rfe DpAddrdW Rfi DpAddrdR FrLeave RfBack DpAddrdR Fre { 0:X1=x; 0:X3=y; 1:X1=y; 1:X4=z; 1:X8=a; 1:X12=x; 2:X1=a; } P0 | P1 | P2 ; MOV W0,#1 | LDR W0,[X1] | MOV W0,#1 ; STR W0,[X1] | EOR W2,W0,W0 | STR W0,[X1] ; DMB SY | MOV W3,#1 | ; MOV W2,#1 | STR W3,[X4,W2,SXTW] | ; STR W2,[X3] | LDR W5,[X4] | ; | EOR W6,W5,W5 | ; | LDR W7,[X8,W6,SXTW] | ; | LDR W9,[X8] | ; | EOR W10,W9,W9 | ; | LDR W11,[X12,W10,SXTW] | ; Observed z=1; y=1; x=1; a=1; 1:X9=0; 1:X7=1; 1:X5=1; 1:X11=1; 1:X0=1; and z=1; y=1; x=1; a=1; 1:X9=0; 1:X7=1; 1:X5=1; 1:X11=0; 1:X0=1; and z=1; y=1; x=1; a=1; 1:X9=0; 1:X7=1; 1:X5=1; 1:X11=1; 1:X0=0; and z=1; y=1; x=1; a=1; 1:X9=0; 1:X7=1; 1:X5=1; 1:X11=0; 1:X0=0;